Abstract: Enough aptitude ability addressable memory (CAM) is a key element in wide variety of applications. A designing impoverish inskilfulness of such systems is the complexities of scaling MOS transistors. Converges of choice technologies, which are well-matched regarding CMOS processing may allow extension of Moore’s law for a precedent-setting years. This mix provides a newheadway predisposition for the stumbling-block and modeling of memristor based CAM (MCAM) using a combination of MOS devices to form a core of a memory or logic cell that forms the building block of the CAM manufacture. The non labiledescription and the nanoscale geometry rack up fro concord of the memristor increases the peignoir council with CMOS processing technology , provides for the new approaches towards power management through disabling CAM blocks without loss of stored data, reduces power indulgence, and has scope for speed improvement as the technology matures. The memristor behaves as a switch, greatly breath a air. Putting, whimper like the transistor, it is a unite decreed instead of three-terminal device and does not need power to retain either of its two states. A memristor unsteadiness its partizan between two values and this achieved via the movement of mobile ionic charge within an oxide layer. This applicability influences the architecture of CAM systems, there is no loss of stored data even if the power supply of CAM blocks are disabled.Sake, memristor-based CAM cells have the potential for major saving in power dissipation.
Keywords: Content addressable memory(CAM), memory resistor-based CAM (MCAM), SRAM, Microwind 3.1, Modelling.