Abstract: Software Defined Radio (SDR) is an emerging technology to realize the many applications without using different hardware components. The FM0/Manchester and systematic codes can be combined to achieve high throughput.FM0/Manchester codes can be used to reach the dc balance and enhancing signal reliability. Systematic codes are used to detect and correct the errors. In this code, the code input is embedded into the encoded output. BWA architecture is used in systematic codes, which is implemented using parallel processing unit to achieve high speed. These encoding techniques are combined using mode selection signal. SOLS technique can be used to reduce the number of transistor used in the architecture. This combined architecture can be implemented in VHDL coding using MODELSIM SE 6.2C software. This proposed architecture can be verified using the FPGA (SPARTAN 3E) kit. An experimental result shows less area and high throughput.

Keywords: FM0, Manchester, Software Defined Radio (SDR), Systematic codes, Similarity Oriented Logic Simplification (SOLS), Butter-fly Formed Weighted Accumulator (BWA), Field Programmable Gate Array (FPGA).