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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
IJARCCE adheres to the suggestive parameters outlined by the University Grants Commission (UGC) for peer-reviewed journals, upholding high standards of research quality, ethical publishing, and academic excellence.
← Back to VOLUME 12, ISSUE 6, JUNE 2023

A Review on Implementation Of Bus Encoding And Decoding Scheme

Rithesh V Shetty, Shreepad, Sumanth Shetty, Bablu, Bhakthi Shetty

DOI: 10.17148/IJARCCE.2023.126103

Abstract: Power computation is crucial for evaluating and enhancing the energy efficiency of contemporary computer systems. Systems for bus encoding and decoding are becoming essential instruments for enhancing the accuracy and efficacy of power analysis. In order to improve the accuracy and efficiency of power analysis, this abstract offers a thorough review of bus encoding and decoding systems created especially for power calculations. Bus encoding algorithms for power computation modify data before it is transported across the bus in order to lower communication power consumption. Utilising encoding techniques such bus inversion coding, transition minimising codes, or differential signalling, redundant or repetitive data patterns are detected and efficiently represented to reduce power swings and dynamic power consumption. These encoding methods reduce bus activity and signal modifications. Keyword: CMOS, Bus Encoding & Decoding, Power Computation, Energy Efficiency.

How to Cite:

[1] Rithesh V Shetty, Shreepad, Sumanth Shetty, Bablu, Bhakthi Shetty, “A Review on Implementation Of Bus Encoding And Decoding Scheme,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2023.126103