A Low Power Semi-Parallel Decoder Using ASM for Polar Codes

Abstract: Polar codes are recently proposed as the first low complexity of codes that can provably achieve the capacity of symmetric binary-input memory less channels. We built an Asynchronous State Machine (ASM) to replace processing elements to control the decoding by state transition method results low power consumption. Our coding scheme also achieves the capacity of the physically degraded receiver-orthogonal relay channel. Though, it reduces power and logical elements to present a new low power technique for VLSI technology. Our proposed system avoids internal switching activity of registers by reusing the processing elements by folding technique. It drastically reduces static and dynamic power of the circuit along with area.

Keywords: Fast Fourier Transform (FFT), Asynchronous State Machine (ASM), Polar Codes, Successive cancelation decoder, Very Large Scale Integration (VLSI).