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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
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← Back to VOLUME 5, ISSUE 3, MARCH 2016

A Survey of Different Adiabatic Techniques for Low Power

Rajasekar G, Boobalan A, Ramkumar M

DOI: 10.17148/IJARCCE.2016.5379

Abstract: This paper describes about different adiabatic logics are used which are all used to provide low power. Adiabatic techniques, such as clocked CMOS logic, latched pass transistor, single phase recovery logic, adiabatic array logic, reversible logic, dual rail logic, adiabatic inverter, pipeline scheduling, CEPAL logics are discussed briefly and comparatively studied those techniques to reduce the power consumption, improve speed of the operation and to minimize area overhead. Different tools are used to design the low power circuits as Microwind, Tanner, and HSPICE.



Keywords: Adiabatic logic, Low power consumption, High speed, Minimum area overhead.

How to Cite:

[1] Rajasekar G, Boobalan A, Ramkumar M, “A Survey of Different Adiabatic Techniques for Low Power,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2016.5379