An ALU Based Online BIST for Varying Word Widths of RAM

Abstract: On-line testing of word oriented memories is fast becoming a basic feature of digital systems, not only for critical applications, but also for highly-available applications. With the use of transparent BIST (built in self test) schemes for testing of RAMs, preservation of memory contents during periodic testing is assured but, it requires more hardware for signature prediction and more time for testing. Symmetric Transparent BIST skips the signature prediction phase, thus reducing the hardware and test time. Previously, one ALU was used for testing one RAM which increases the hardware of BIST circuit. The proposed method uses a symmetric transparent BIST scheme and an ALU capable of testing more than one RAM thus decreasing the hardware required to test RAM modules on a die. Different word widths of RAMs can be tested by using addition and subtraction operation of ALU with the help of series of March elements. Four RAM modules are tested using one ALU module in a roving manner. Due to the decrease in hardware overhead of proposed scheme the test time is also reduced.

Keywords: BIST (built in self test, March algorithms, memory test, Symmetric transparent built in self test (BIST), online testing, memory testing, and hardware overhead.