Design and Implementation of a Digital Accumulator for the Phase Coherent Radio Pulse Signal using FPGA

Abstract: In this paper, we introduce a practical mechanism of forming and accumulating phase coherent radio pulses signal in presence of additive white Gaussian noise (AWGN) by a digital pulses accumulator using FPGA to improve the signal-to-noise ratio (SNR) through designing a direct digital frequency synthesizer (DDFS) to synthesize the phase coherent radio pulses signal in presence of AWGN by digital pseudo noise generator (DPNG) at different SNRinp and design a digital accumulator for 20 phase coherent radio pulses, and this maximizes SNRout by 13 dB using Quartus II 9.1 design environment.

Keywords: AWGN ,Radio Pulse, DDFS, DPNG, Digital Accumulator ,FPGA.