Design and Optimization Low Power Adder using GDI Technique

Abstract: The main objective of this paper is to provide new low power solutions for Very Large Scale Integration (VLSI) Designers. This works focuses on power dissipation reduction. Due to which growth increases with the scaling down of the technologies. Addition is a fundamental arithmetic operation widely used in many VLSI systems, such as application specific DSP architectures and microprocessors. The adder is one of the most critical components of a central processing unit. The object of the adders not only adding of bits but also involves in address calculation, subtraction, division and multiplication, the adders are critical components to determine the speed, delay and power of the overall system, low power adders are always preferable.

Keywords: Adder, GDI, Low Power VLSI, Leakage current.