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Design and Synthesis of 16-bit ALU using Reversible Logic Gates
PREMANANDA B S, Y M RAVINDRANATH Department of Telecommunication, R.V. College of Engineering, Bangalore, India Department of Electronics and Communication, M.E.I. Polytechnic, Bangalore, India
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This work is licensed under a Creative Commons Attribution 4.0 International License.How to Cite:
[1] PREMANANDA B S, Y M RAVINDRANATH Department of Telecommunication, R.V. College of Engineering, Bangalore, India Department of Electronics and Communication, M.E.I. Polytechnic, Bangalore, India, βDesign and Synthesis of 16-bit ALU using Reversible Logic Gates,β International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)