Design of a Variable point FFT processor for 4G Standards

Abstract: In this paper, We propose a design of a variable point FFT processor using FPGA in which OFDMA Technology is applied. The FFT processor use Verilog HDL language to describe the circuit, use Quartus II 7.2 software to build the model, and use ModelSim SE 6.2b software to verify the timing function. Therefore, this design can be applied to real-t ime signal processing system, co mpletes the main co mputing modules in the OFDMA system. The performance of the system is analy zed using MATLAB software and the result shows that The SINR of wireless OFDMA in the presence of CFO (carrier frequency offset) and frequency selective fading becomes a ratio of correlated random variables, and recent research results have not provided exact expressions for its average. In this paper, we have presented a new non-direct mathemat ical analysis which led to the derivation of a simple new exp ression for the average SINR of OFDMA in the presence of CFO over mult ipath Rayleigh fading.

Keywords: FPGA, OFDMA, CFO