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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
IJARCCE adheres to the suggestive parameters outlined by the University Grants Commission (UGC) for peer-reviewed journals, upholding high standards of research quality, ethical publishing, and academic excellence.
← Back to VOLUME 7, ISSUE 4, APRIL 2018

Design of High Performance and Low Power Content Addressable Memory with Parity Logic and Precharge Free Techniques

A. Ebziba, Dr.L. Jubair Ahmed

DOI: 10.17148/IJARCCE.2018.7440

Abstract: Content-Addressable Memory (CAM) is useful for high-performance forwarding, which performs the search in a single clock cycle. In a CAM, the user supplies the content to be searched, and the CAM gives back the address location or performs association. There are several things needs to be satisfied to extract an efficient CAM from those challenges. So in this era the necessity special design is needed to satisfy the problems which are designed in the proposed system. In proposed framework, used a novel technique named as Hybrid CAM. Hybrid architecture of parity and precharge free logic which is designed with both NAND and NOR type CAM. The NOR type Match Line (ML) is always provide a parallel operation such that the data bits are proceeded into the CAM array with parallel manner. The use of NOR cell makes the drastic reduction of delay in the circuits. At the same time power is also reduced reasonably. The hybrid CAM architecture, the combination of parity logic and precharge free technique will distribute an effective energy level and high speed compared to the previous system.



Keywords: Content-addressable memory, Hybrid architecture, precharge free technique.

How to Cite:

[1] A. Ebziba, Dr.L. Jubair Ahmed, “Design of High Performance and Low Power Content Addressable Memory with Parity Logic and Precharge Free Techniques,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2018.7440