Design of PTL based Area Efficient and Low Power 4-bit ALU

Abstract: Now a day�s Area, Low power, and Speed are the major concerns of the VLSI circuits. In this paper a new design approach is introduced for reducing number of transistors and power consumption and dissipation in VLSI circuits. Here, a new design approach is followed based on pass transistor logic which provides better performance in terms of low power, area, and speed of the VLSI circuits. The explored method is implemented on ALU (Arithmetic Logic Unit) to reduce the trade off parameters. After compare the results of proposed ALU with conventional ALU, this Proposed ALU gives better performance in terms of power and area. All the work has been carried out on Tanner EDA Tool 13.0 and Micro wind 3.1.

Keywords: Pass Transistor Logic, Arithmetic Logic Unit, Low Power, Area.