📞 +91-7667918914 | ✉️ ijarcce@gmail.com
IJARCCE Logo
International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
IJARCCE adheres to the suggestive parameters outlined by the University Grants Commission (UGC) for peer-reviewed journals, upholding high standards of research quality, ethical publishing, and academic excellence.
← Back to VOLUME 2, ISSUE 7, JULY 2013

Fast Charge Pump Circuit for PLL using 50nm CMOS Technology

YOGENDRA PRATAP SINGH, DR. R.K.CHAUHAN Student, Department of Electronics and Communication Engineering,Madan Mohan Malaviya Engineering College, Gorakhpur, India Asst. Professor, Department of Electronics and Communication Engineering, Madan Mohan Malaviya Engineering College, Gorakhpur, India

Downloads:

How to Cite:

[1] YOGENDRA PRATAP SINGH, DR. R.K.CHAUHAN Student, Department of Electronics and Communication Engineering,Madan Mohan Malaviya Engineering College, Gorakhpur, India Asst. Professor, Department of Electronics and Communication Engineering, Madan Mohan Malaviya Engineering College, Gorakhpur, India, “Fast Charge Pump Circuit for PLL using 50nm CMOS Technology,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)