← Back to VOLUME 2, ISSUE 7, JULY 2013
FPGA Implementation of FIR based Decimation Filter Structure for WiMAX Application
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[1] V.JAYAPRAKASAN, M.MADHESWARAN Research Scholar, Department of ECE, Jawaharlal Nehru Technological University, Anantapur, Andhra Pradesh, India Research Supervisor, Centre for Advanced Research, Muthayammal Eng., College, Rasipuram, Tamilnadu, India, “FPGA Implementation of FIR based Decimation Filter Structure for WiMAX Application,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
