Low Power Op-Amp Design with Current Compensation Technique

Abstract: The trends in electronic design field are growing day by day towards the low power chip design system. The need of smaller size chips with very small power dissipation increases the demand of low power designs. The supply voltage must be reduced to lower the overall power consumption of the system. In this paper ,we are presented a low power single output two stage CMOS operational amplifier (Op-Amp) with current buffer compensation technique operates in weak inversion region with a 1.8 V supply voltage. The two stage CMOS Op-Amp is designed in UMC 0.18μm CMOS technology. Since MOS transistor in sub-threshold region allows to work at low input bias current and low voltage, so the presented Op-Amp has very low power consumption with a high driving capabilities. The proposed Op-Amp has open loop gain =73.57db, the gain bandwidth product (GBW) 1.094 and 4.35μW power consumption.

Keywords: Two Stage CMOS Operational Amplifier (Op-Amp), Current Buffer Compensation, Power Dissipation, Low-Power, Low-Voltage, Power Consumption.