Microcode March SS Algorithm Implementation in the MBIST with Redundancy Repair Module

Abstract: There is a huge exponential growth in the area occupied by the embedded memories on the System-on-Chip (SoC) because of the data that the users prefer to store in the devices. The expectation of the user is that it has to be very precise and accurate at the same time. Hence there is a need for testing these modules once in a while for which Built in Self Test was introduced in recent years. Testing is only an initial part after which comes the repairing where the faults detected during testing must be answered. In this paper March SS algorithm is implemented to test an embedded memory in such a way that the steps in the algorithm is converted into microcode that is the most optimized way of implementing a algorithm that is used for testing in BIST module. Along with BIST an enhancement where we can repair the faulty address locations is included which does the repairing by the means of a Redundancy module. Due to this we can have the best implementation where we can have a testing as well as repairing the faulty address location in a single SoC. The proposed architecture was implemented using Verilog HDL, simulated using Xilinx simulation tool and synthesis by Xilinx Synthesis tool.

Keywords: Built in Self Test (BIST), Redundancy module, March SS algorithm.