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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
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← Back to VOLUME 5, ISSUE 7, JULY 2016

Optimized Design of Active Pixel Sensor using CMOS 180 nm Technology

Dipti, Rajesh Mehra, Deep Sehgal

DOI: 10.17148/IJARCCE.2016.5783

Abstract: In this paper, an Active Pixel Sensor of CMOS Imager using 5T architecture has presented. The sensor has been designed in 180nm CMOS technology. This CMOS Image Sensor consist of pixel that act as basic unit cell, called picture element that employs number of NMOS transistors with single reverse bias p-n-junction diode. The schematic, layout and simulated results of Pixel have been presented and described. The pixel designed in this paper occupies the area of (10X10) um2. There are such parameters of Pixel have been modified- Well capacity, Conversion gain and Fill factor. The calculated results of sensor employs well capacity of (55935 e-), Conversion gain of (39.5 �V/e-) and Fill factor of (45.5%).



Keywords: CMOS Image Sensor (CIS), Active Pixel Sensor (APS), Photodiode, Image Sensor, CMOS.

How to Cite:

[1] Dipti, Rajesh Mehra, Deep Sehgal, “Optimized Design of Active Pixel Sensor using CMOS 180 nm Technology,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2016.5783