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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
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← Back to VOLUME 5, ISSUE 6, JUNE 2016

Performance Evaluation of Duty Cycle Modulation in HPC

Aparna Sure, Dr S.L.Deshpande

DOI: 10.17148/IJARCCE.2016.56109

Abstract: High Performance computing (HPC) is the use of parallel processing for running application program efficiently, reliably and quickly. HPC is also refers to how fast one can get the result, and how efficiently can get the result. HPC can also refer as high productivity of systems. Speedup of high performance is measured by considering the parameters like threads. Here 3 cases are considered that is; keeping the number of jobs constant and varying number of threads, keeping number of threads constant and varying number of jobs. And modifying the duty cycle of the threads. The numbers of runs are considered and founded the ideal number of threads to gain the average speedup.



Keywords: Number of threads, number of jobs, average speedup.

How to Cite:

[1] Aparna Sure, Dr S.L.Deshpande, “Performance Evaluation of Duty Cycle Modulation in HPC,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2016.56109