Review of 6T SRAM Technique for Reducing Power Consumption and Cost

Abstract: With growing memory and processing needs of high performance systems, it is becoming important to have low power and efficient memory circuits as it constitutes more than 70% of circuit in a general purpose processor. Low static leakage current and higher noise immunity is major requirement of memory circuits in such systems. In this work we have conducted a regressive study of different FinFet based SRAM cells and compared the performance parameters of the selected cells. On the basis of study and comparison we have concluded a scope of work on which further research will be conducted.

Keywords: 6T SRAM, TMIG FinFet, IG FinFet, HSPICE, 7T SRAM.