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Study The Characteristics Of 65nm PMOS Transistor Incorporating The SILVACO TCAD TOOLS
ANIL KUMAR, ANJANI KUMAR, A.K.JAISWAL, ARPITA BHARTI Asst.Prof, Deptt.of ECE, SHIATS, Allahabad, India PG Student,Deptt.of ECE, SHIATS, Allahabad, India Professor,Deptt.of ECE, SHIATS, Allahabad, India
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Abstract: This paper explains about the characteristics of 65 nm PMOS technology with strained silicon in terms of electrical parameters like drain current, gate voltage etc.. Fabrication processes of transistor were performed by the ATHENA fabrication simulator while electrical characterisation of device was performed by ATLAS simulator. The comparison of the performance of conventional 65 nm PMOS and strained silicon 65nm PMOS was done by ππ-ππ characteristic. Comparison result represents the strained silicon PMOS had lesser power consumption in comparison to conventional PMOS.
Keywords: PMOS, strained silicon, threshold voltage, simulation process
Keywords: PMOS, strained silicon, threshold voltage, simulation process
How to Cite:
[1] ANIL KUMAR, ANJANI KUMAR, A.K.JAISWAL, ARPITA BHARTI Asst.Prof, Deptt.of ECE, SHIATS, Allahabad, India PG Student,Deptt.of ECE, SHIATS, Allahabad, India Professor,Deptt.of ECE, SHIATS, Allahabad, India , βStudy The Characteristics Of 65nm PMOS Transistor Incorporating The SILVACO TCAD TOOLS,β International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
This work is licensed under a Creative Commons Attribution 4.0 International License.