VLSI DESIGN OF A SQUARING ARCHITECTURE BASED ON VEDIC MATHEMATICS

Abstract: In the modern world of digitalization, processing of data in real time requires an increase in the operating speed of a system. In digital epoch, the thirst for high speed is fulfilled by the accomplishment of digital multipliers. Multipliers play a fundamental role in many high-speed applications where the complex multiplications are carried out by squaring operations. Vedic Mathematics is a part of Atharva Veda which deals with the easiest methodology for all types of arithmetic calculations. Dvanda Yoga is one of the squaring algorithms of Vedic Mathematics. In this project, the design is simulated and realized with the help of Xilinx 9.2i.

Keywords: Multiplication, Squaring Architecture,Vedic mathematics, Xilinx 9.2i.