📞 +91-7667918914 | ✉️ ijarcce@gmail.com
IJARCCE Logo
International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
IJARCCE adheres to the suggestive parameters outlined by the University Grants Commission (UGC) for peer-reviewed journals, upholding high standards of research quality, ethical publishing, and academic excellence.
← Back to VOLUME 7, ISSUE 7, JULY 2018

Analysis of Low Power and High Speed Double Tail Comparator using FinFET Technology

Shwet Kumar, Sanjeev Srivastav, Satyarth Tiwari

DOI: 10.17148/IJARCCE.2018.7712

Abstract: In conventional double tail comparators, Kick-back noise is produced and the circuit requires high input impedance. Due to aggressive scaling of MOS, short channel effects occur and there is a need of substitutes like FinFETS. In this paper, we have designed double tail comparator by using FinFET technology in shorted gate mode. It is seen from results that the power and delay are reduced in a large quantity maintaining the output waveforms to the previous one. This improves efficiency of the system and noise tolerance and leakage current are also reduced. This can be beneficial for the Analog to Digital Converters, reference voltage comparison.



Keywords: FinFET, Double tail Comparator, 32nm, MOSFET

How to Cite:

[1] Shwet Kumar, Sanjeev Srivastav, Satyarth Tiwari, “Analysis of Low Power and High Speed Double Tail Comparator using FinFET Technology,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2018.7712