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This work is licensed under a Creative Commons Attribution 4.0 International License.
Parallel processing in processor organization
PRABHUDEV S IRABASHETTI Assistant Professor, Department of Computer, Vishwabharati Academy’s college of Engg, Ahmednagar(Dist). University of Pune, Maharashtra, India
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Abstract: This paper reviews the coverage of parallel processing in processor organization. A parallel processing becomes more popular, the need for improvement in parallel processing in processor organization becomes even more important. Here compared each multiple processor organization, 1) SISD: single instruction single data, 2) SIMD: Single instruction multiple data 3) MISD: Multiple instruction single data and 4) MIMD: Multiple instruction multiple data
Keywords: Data, Instruction, IS: Instruction Set, CU: Control Unit, MU: Memory Unit PU: Processing Unit, LM: Local Memory, PE: Processing Element
Keywords: Data, Instruction, IS: Instruction Set, CU: Control Unit, MU: Memory Unit PU: Processing Unit, LM: Local Memory, PE: Processing Element
How to Cite:
[1] PRABHUDEV S IRABASHETTI Assistant Professor, Department of Computer, Vishwabharati Academy’s college of Engg, Ahmednagar(Dist). University of Pune, Maharashtra, India, “Parallel processing in processor organization,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
This work is licensed under a Creative Commons Attribution 4.0 International License.