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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
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← Back to VOLUME 7, ISSUE 5, MAY 2018

Optimization of Half, Full and 4 Bit Ripple Carry Adders

Sandhya Bhardwaj, Anuj Sharma

DOI: 10.17148/IJARCCE.2018.7542

Abstract: In this paper, a varied range of adder circuits are designed in which half adder cmos, full adder cmos and RCA cmos are included, are designed using MOSFET in 32nm Technology length. Then, they are simulated using HSPICE and the performance parameters of adders such as average power and delay are determined. A dual mode low power technique is applied on Ripple Carry Adder to reduce power.

Keywords:  Adder, Dual-Mode, 32nm.

How to Cite:

[1] Sandhya Bhardwaj, Anuj Sharma, “Optimization of Half, Full and 4 Bit Ripple Carry Adders,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2018.7542